Electrical Engineer pursuing an M.Sc. in Electrical Engineering at Cairo University. Specialized in CMOS timing circuits, precision analog building blocks, and low-power RF front-ends. Experienced in full-custom schematic, simulation, and physical layout across TSMC 65nm, TSMC 180nm, and open-source SkyWater 130nm PDKs.
Designed for RF local oscillator generation. Implemented a complete integer-N charge-pump PLL including LC-VCO with switched capacitor array, high-speed TSPC PFD, and low-mismatch charge pump.
| Tuning Range | Phase Noise @ 1MHz | Lock Time | Ref Spurs |
|---|---|---|---|
| 7.15 – 10.32 GHz | -108.5 dBc/Hz @ 8 GHz | 8.4 µs | -64 dBc |
Precision voltage and temperature reference using current-mode summation. Corner-verified from -40°C to +125°C across slow/typical/fast process corners and supply variations.
| Nominal VREF | Temperature Range | PSR @ DC | Temp Coefficient |
|---|---|---|---|
| 0.600 V | -40 °C to +125 °C | -42.3 dB | 14.8 ppm/°C |
Differential pair input with active current mirror load followed by a common-source output stage. Nulling resistor compensation eliminates RHP zero and achieves robust phase margin.
| DC Gain (Av) | Phase Margin (PM) | Unity Gain BW | CMRR / Slew Rate |
|---|---|---|---|
| 68.4 dB | 64.2 deg | 185 MHz | 76.1 dB | 5.2 V/µs |
Inductively degenerated cascode topology optimized for low noise figure (NF) and simultaneous noise and impedance input matching at 5.2 GHz.
Transistor-level design, static noise margin (SNM) analysis of a 6T SRAM cell, plus DRC/LVS clean full-custom layouts for BCD Decoders and logic gates.
Research focus on ultra-low-power analog circuits, timing generators, and PVT-robust architectures in advanced CMOS nodes.
Intensive specialized training covering op-amp frequency compensation, BGR, LDO regulators, RF transceiver architectures, and full-flow Cadence Virtuoso / Calibre verification.
Optimized electronics assembly line yield, performed hardware failure root-cause analysis, and supported new product introductions (NPI).
Teaching optical communications, FTTx networks, and applied electronics, bridging theoretical concepts with hands-on lab experiments.
A structured directory of analog IC notes, circuit derivations, and M.Sc. course lectures (e.g., ELC 601: Analog ICs) directly synced from my Obsidian Vault.